I. Field
The present disclosure generally relates to gain error correction. More particularly, the disclosure relates to offset and gain error correction in a discrete time circuit, such as an Analog-to-Digital converter (ADC).
II. Description of Related Art
Normally, in any ADCs, there is a systematic offset error at zero-code and a systematic gain error at full-scale-code. Since these errors are systematic, they can be calibrated after the first round of testing before mass-production of the ADCs.
Such errors have in the past been corrected through use of a look-up table including correction codes or through the use of correlated double-sampling. These methods involve more circuitry and demand more power. With ADC's being utilized in smaller, battery-powered environments, such as a wireless phone, PDA or laptop computer, minimization of circuitry and power conservation to preserve battery life is more important.
Accordingly it would be advantageous to provide an improved system for correcting offset errors.